Now showing items 256-275 of 358

    Paralelización automática de recurrencias en programas secuenciales numéricos 

    Ayguadé i Parra, Eduard (Date of defense: 1989-10-21)

    La programació d'aplicacions en màquines paral·leles és un tema d'interès quant a que cada vegada són més les màquines d'aquest tipus disponibles comercialment.<br><br/>Per a això l'usuari disposa de dues opcions: (a) ...

    Parallel algorithms for fluid and rigid body interaction 

    Samaniego Alvarado, Cristóbal (Date of defense: 2015-12-14)

    This thesis is based on the implementation of a computational system to numerically simulate the interaction between a fluid and an arbitrary number of rigid bodies. This implementation was performed in a distributed ...

    Parallel architectures and runtime systems co-design for task-based programming models 

    Castillo Villar, Emilio (Date of defense: 2019-04-29)

    The increasing parallelism levels in modern computing systems has extolled the need for a holistic vision when designing multiprocessor architectures taking in account the needs of the programming models and applications. ...

    Parallel video decoding 

    Álvarez Mesa, Mauricio (Date of defense: 2011-09-08)

    Digital video is a popular technology used in many different applications. The quality of video, expressed in the spatial and temporal resolution, has been increasing continuously in the last years. In order to reduce the ...

    Particle-in-cell algorithms for plasma simulations on heterogeneous architectures 

    Sáez Pous, Xavier (Date of defense: 2016-01-25)

    During the last two decades, High-Performance Computing (HPC) has grown rapidly in performance by improving single-core processors at the cost of a similar growth in power consumption. The single-core processor improvement ...

    Per-task energy metering and accounting in the multicore era 

    Liu, Qixiao (Date of defense: 2016-05-26)

    Chip multi-core processors (CMPs) are the preferred processing platform across different domains such as data centers, real-time systems and mobile devices. In all those domains, energy is arguably the most expensive ...

    Performance and power optimizations in chip multiprocessors for throughput-aware computation 

    Vega, Augusto J. (Date of defense: 2013-07-30)

    The so-called "power (or power density) wall" has caused core frequency (and single-thread performance) to slow down, giving rise to the era of multi-core/multi-thread processors. For example, the IBM POWER4 processor, ...

    Performance characterization and optimization of in-memory data analytics on a scale-up server 

    Awan, Ahsan Javed (Date of defense: 2017-12-15)

    The sheer increase in volume of data over the last decade has triggered research in cluster computing frameworks that enable web enterprises to extract big insights from big data. While Apache Spark defines the state of ...

    Performance Improvement of Multithreaded Java Applications Execution on Multiprocessor Systems 

    Guitart Fernández, Jordi (Date of defense: 2005-11-02)

    El disseny del llenguatge Java, que inclou aspectes importants com són la seva portabilitat i neutralitat envers l'arquitectura, les seves capacitats multithreading, la seva familiaritat (degut a la seva semblança amb ...

    Performance Prediction and Evaluation Tools 

    Girona Turell, Sergi (Date of defense: 2003-07-24)

    La predicció és un concepte de recerca molt interessant. No es només predir el resultat futur, sinó que també cal predir el resultat conegut, a vegades anomenat validació. <br/><br/>L'aplicació de tècniques de predicció ...

    Performance simulation methodologies for hardware/software co-designed processors 

    Brankovic, Aleksandar (Date of defense: 2015-03-17)

    Recently the community started looking into Hardware/Software (HW/SW) co-designed processors as potential solutions to move towards the less power consuming and the less complex designs. Unlike other solutions, they reduce ...

    Performance-aware energy optimizations in networks for HPC 

    Saravanan, Karthikeyan P. (Date of defense: 2016-11-02)

    Energy efficiency is an important challenge in the field of High Performance Computing (HPC). High energy requirements not only limit the potential to realize next-generation machines but are also an increasing part of the ...

    Planificación global en sistemas multiprocesador de tiempo real 

    Banús Alsina, Josep María (Date of defense: 2008-05-29)

    Esta tesis afronta el problema de la planificación de sistemas de tiempo real utilizando sistemas multiprocesador con memoria compartida. Según laliteratura este problema es NP-Hard. En las aplicaciones de sistemas de ...

    Power- and Performance - Aware Architectures 

    Canal Corretger, Ramon (Date of defense: 2004-06-14)

    The scaling of silicon technology has been ongoing for over forty years. We are on the way to commercializing devices having a minimum feature size of one-tenth of a micron. The push for miniaturization comes from the ...

    Power-constrained aware and latency-aware microarchitectural optimizations in many-core processors 

    Jha, Sudhanshu S. (Date of defense: 2016-10-05)

    As the transistor budgets outpace the power envelope (the power-wall issue), new architectural and microarchitectural techniques are needed to improve, or at least maintain, the power efficiency of next-generation processors. ...

    Practical strategies to monitor and control contention in shared resources of critical real-time embedded systems 

    Cardona Nadal, Jordi (Date of defense: 2023-04-03)

    (English) In the last decade performance needs in Critical Real-Time Embedded Systems (CRTES) domains like automotive, avionics, railway or space have been steadily on the rise due to the unprecedented computational power ...

    Predicated execution and register windows for out-of-order processors 

    Quiñones Moreno, Eduardo (Date of defense: 2008-11-18)

    ISA extensions are a very powerful approach to implement new hardware techniques that require or benefit from compiler support: decisions made at compile time can be complemented at runtime, achieving a synergistic effect ...

    Priority realloc : a threefold mechanism for route and resources allocation in EONs 

    Dantas, Joana Sócrates (Date of defense: 2015-07-17)

    Backbone networks are responsible for long-haul data transport serving many clients with a large volume of data. Since long-haul data transport service must rely on a robust high capacity network the current technology ...

    Proactive software rejuvenation solution for web enviroments on virtualized platforms 

    Alonso López, Javier (Date of defense: 2011-02-21)

    The availability of the Information Technologies for everything, from everywhere, at all times is a growing requirement. We use information Technologies from common and social tasks to critical tasks like managing nuclear ...

    Probabilistically time-analyzable complex processor designs 

    Slijepcevic, Mladen (Date of defense: 2017-11-13)

    Industry developing Critical Real-Time Embedded Systems (CRTES), such as Aerospace, Space, Automotive and Railways, faces relentless demands for increased guaranteed processor performance to support new advanced functionalities ...