Now showing items 1-20 of 259

    Multifaceted resource management on virtualized providers 

    Goiri, Íñigo (Date of defense: 2011-06-14)

    Last decade, providers started using Virtual Machines (VMs) in their datacenters to pack users and their applications. This was a good way to consolidate multiple users in fewer physical nodes while isolating them from ...

    Adaptive memory hierarchies for next generation tiled microarchitectures 

    Herrero Abellanas, Enric (Date of defense: 2011-07-05)

    Les últimes dècades el rendiment dels processadors i de les memòries ha millorat a diferent ritme, limitant el rendiment dels processadors i creant el conegut memory gap. Sol·lucionar aquesta diferència de rendiment és un ...

    Programming, debugging, profiling and optimizing transactional memory programs 

    Hasanov Zyulkyarov, Ferard (Date of defense: 2011-07-19)

    Transactional memory (TM) is a new optimistic synchronization technique which has the potential of making shared memory parallel programming easier compared to locks without giving up from the performance. This thesis ...

    A Multi-core processor for hard real-time systems 

    Paolieri, Marco (Date of defense: 2011-11-04)

    The increasing demand for new functionalities in current and future hard real-time embedded systems, like the ones deployed in automotive and avionics industries, is driving an increment in the performance required in ...

    Managing dynamic non-uiform cache architectures 

    Lira Rueda, Javier (Date of defense: 2011-11-25)

    Researchers from both academia and industry agree that future CMPs will accommodate large shared on-chip last-level caches. However, the exponential increase in multicore processor cache sizes accompanied by growing on-chip ...

    GMPLS-OBS interoperability and routing acalability in internet 

    Mendoça Pedroso, Pedro Miguel (Date of defense: 2011-12-16)

    The popularization of Internet has turned the telecom world upside down over the last two decades. Network operators, vendors and service providers are being challenged to adapt themselves to Internet requirements in a way ...

    Architectural support for high-performing hardware transactional memory systems 

    Lupon Navazo, Marc (Date of defense: 2011-12-23)

    Parallel programming presents an efficient solution to exploit future multicore processors. Unfortunately, traditional programming models depend on programmer’s skills for synchronizing concurrent threads, which makes ...

    Efficient algorithms for passive network measurement 

    Sanjuàs Cuxart, Josep (Date of defense: 2012-03-23)

    Network monitoring has become a necessity to aid in the management and operation of large networks. Passive network monitoring consists of extracting metrics (or any information of interest) by analyzing the traffic that ...

    Cross-layer optimization in optical networks 

    Angelou, Marianna (Date of defense: 2012-04-16)

    Network planning and operation in core optical networks require processes that lead to a cost-effective network able to effectively accommodate the given traffic demands. Crosslayer techniques that exploit information ...

    Architectural explorations for streaming accelerators with customized memory layouts 

    Shafiq, Muhammad (Date of defense: 2012-05-21)

    El concepto básico de la arquitectura mono-nucleo en los procesadores de propósito general se ajusta bien a un modelo de programación secuencial. La integración de multiples núcleos en un solo chip ha permitido a los ...

    DVFS power management in HPC systems 

    Etinski, Maja (Date of defense: 2012-06-01)

    Recent increase in performance of High Performance Computing (HPC) systems has been followed by even higher increase in power consumption. Power draw of modern supercomputers leads to very high operating costs and ...

    Software caching techniques and hardware optimizations for on-chip local memories 

    Vujic, Nikola (Date of defense: 2012-06-05)

    Despite the fact that the most viable L1 memories in processors are caches, on-chip local memories have been a great topic of consideration lately. Local memories are an interesting design option due to their many benefits: ...

    Towards lightweight and high-performance hardware transactional memory 

    Tomić, Sasa (Date of defense: 2012-07-13)

    Conventional lock-based synchronization serializes accesses to critical sections guarded by the same lock. Using multiple locks brings the possibility of a deadlock or a livelock in the program, making parallel programming ...

    Opportunistic routing in wireless mesh networks 

    Darehshoorzadeh, Amir (Date of defense: 2012-07-23)

    Advances in communication and networking technologies are rapidly making ubiquitous network connectivity a reality. In recent years, Wireless Mesh Networks (WMNs) have already become very popular and been receiving an ...

    A multicore emulator with a profiling Infrastructure for transactional memory on FPGA 

    Sönmez, Nehir (Date of defense: 2012-09-19)

    This thesis attempts to bring together two recent topics by presenting a flexible Transactional Memory environment on a multicore prototype that is realized on FPGA fabric. For this, we devise a MIPS-compatible shared-memory ...

    An Online writer recognition system based on in-air and on-surface trajectories 

    Sesa Nogueras, Enric (Date of defense: 2012-09-20)

    The main motivation of this dissertation is the exploration of the field of online text-dependent writer recognition, in order to provide evidence of the usefulness of short sequences of text to perform identification and ...

    Architecture support for intrusion detection systems 

    Sreekar Shenoy, Govind (Date of defense: 2012-10-30)

    System security is a prerequisite for efficient day-to-day transactions. As a consequence, Intrusion Detection Systems (IDS) are commonly used to provide an effective security ring to systems in a network. An IDS operates ...

    Distributed detection of anomalous internet sessions 

    García-Cervigon Gutiérrez, Manuel (Date of defense: 2012-11-02)

    Financial service providers are moving many services online reducing their costs and facilitating customers¿ interaction. Unfortunately criminals have quickly found several ways to avoid most security measures applied to ...

    Desarrollo de un workflow genérico para el modelado de problemas de barrido paramétrico en sistemas distribuidos 

    Reyes Ávila, Sebastian (Date of defense: 2012-11-23)

    This work presents the development and experimental validation of a generic workflow model applicable to any parameter sweep problem: the Parameter Sweep Scientific Workflow (PSWF) model. As part of it, a model for the ...

    Cross-layer modeling and optimization of next-generation internet networks 

    Pedrola Escribà, Oscar (Date of defense: 2012-11-30)

    Scaling traditional telecommunication networks so that they are able to cope with the volume of future traffic demands and the stringent European Commission (EC) regulations on emissions would entail unaffordable investments. ...