Programa de Doctorat en Arquitectura de Computadors: Enviaments recents
Ara mostrant els elements 181-200 de 260
Extending the applicability of deterministic multithreading
With the increased number of cores on a single processor chip, an application can achieve good performance if it splits the execution into multiple threads that run on multiple cores at the same time. To synchronize threads, ...
Code-Centric Domain Isolation : a hardware/software co-design for efficient program isolation
Current software systems contain a multitude of software components: from simple libraries to complex plugins and services. System security and resiliency depends on being able to isolate individual components onto separate ...
Macro- and microscopic analysis of the internet economy from network measurements
The growth of the Internet impacts multiple areas of the world economy, and it has become a permanent part of the economic landscape both at the macro- and at microeconomic level. On-line traffic and information are currently ...
Incentives for sharing heterogeneous resources in distributed systems : a participatory approach
Contributory and volunteer computing ecosystems built around a community of participants need, like any other common-pool resources, an adaptive governance mechanism to guarantee the sustainability of the ecosystem. ...
Parallel algorithms for fluid and rigid body interaction
This thesis is based on the implementation of a computational system to numerically simulate the interaction between a fluid and an arbitrary number of rigid bodies. This implementation was performed in a distributed ...
Hardware thread scheduling algorithms for single-ISA asymmetric CMPs
Through the past several decades, based on the Moore's law, the semiconductor industry was doubling the number of transistors on the single chip roughly every eighteen months. For a long time this continuous increase in ...
Semantic resource management and interoperability between distributed computing platforms
Distributed Computing is the paradigm where the application execution is distributed across different computers connected by a communication network. Distributed Computing platforms have evolved very fast during the las ...
MPI layer techniques to improve network energy efficiency
Interconnection networks represent the backbone of large-scale parallel systems. In order to build ultra-scale supercomputers larger interconnection networks are being designed and deployed. As compute nodes become more ...
SIMD@OpenMP : a programming model approach to leverage SIMD features
SIMD instruction sets are a key feature in current general purpose and high performance architectures. SIMD instructions apply in parallel the same operation to a group of data, commonly known as vector. A single SIMD/vector ...
Transparent management of scratchpad memories in shared memory programming models
Cache-coherent shared memory has traditionally been the favorite memory organization for chip multiprocessors thanks to its high programmability. In this organization the cache hierarchy is in charge of moving the data and ...
Programming models and scheduling techniques for heterogeneous architectures
There is a clear trend nowadays to use heterogeneous high-performance computers, as they offer considerably greater computing power than homogeneous CPU systems. Extending traditional CPU systems with specialized units ...
Automated design of domain-specific custom instructions = Geautomatiseerd ontwerp van domeinspecifieke gespecialiseerde instructies
In the last years, hardware specialization has received renewed attention as chips approach a utilization wall. Specialized accelerators can take advantage of underutilized transistors implementing custom hardware that ...
Low-cost and efficient fault detection and diagnosis schemes for modern cores
Continuous improvements in transistor scaling together with microarchitectural advances have made possible the widespread adoption of high-performance processors across all market segments. However, the growing reliability ...
Run-time support for multi-level disjoint memory address spaces
High Performance Computing (HPC) systems have become widely used tools in many industry areas and research fields. Research to produce more powerful and efficient systems has grown in par with their popularity. As a ...
Priority realloc : a threefold mechanism for route and resources allocation in EONs
Backbone networks are responsible for long-haul data transport serving many clients with a large volume of data. Since long-haul data transport service must rely on a robust high capacity network the current technology ...
Cache memory design in the FinFET era
The major problem in the future technology scaling is the variations in process parameters that are interpreted as imperfections in the development process. Moreover, devices are more sensitive to the environmental changes ...
On the scalability of LISP and advanced overlaid services
In just four decades the Internet has gone from a lab experiment to a worldwide, business critical infrastructure that caters to the communication needs of almost a half of the Earth's population. With these figures on its ...
On the programmability of multi-GPU computing systems
Multi-GPU systems are widely used in High Performance Computing environments to accelerate scientific computations. This trend is expected to continue as integrated GPUs will be introduced to processors used in multi-socket ...
An ontology-based approach toward the configuration of heterogeneous network devices
Despite the numerous efforts of standardization, semantic issues remain in effect in many subfields of networking. The inability to exchange data unambiguously between information systems and human resources is an issue ...
Energy-efficient mobile GPU systems
The design of mobile GPUs is all about saving energy. Smartphones and tablets are battery-operated and thus any type of rendering needs to use as little energy as possible. Furthermore, smartphones do not include sophisticated ...
