Programa de Doctorat en Arquitectura de Computadors: Envíos recientes
Mostrando ítems 201-220 de 272
SIMD@OpenMP : a programming model approach to leverage SIMD features
SIMD instruction sets are a key feature in current general purpose and high performance architectures. SIMD instructions apply in parallel the same operation to a group of data, commonly known as vector. A single SIMD/vector ...
Transparent management of scratchpad memories in shared memory programming models
Cache-coherent shared memory has traditionally been the favorite memory organization for chip multiprocessors thanks to its high programmability. In this organization the cache hierarchy is in charge of moving the data and ...
Programming models and scheduling techniques for heterogeneous architectures
There is a clear trend nowadays to use heterogeneous high-performance computers, as they offer considerably greater computing power than homogeneous CPU systems. Extending traditional CPU systems with specialized units ...
Automated design of domain-specific custom instructions = Geautomatiseerd ontwerp van domeinspecifieke gespecialiseerde instructies
In the last years, hardware specialization has received renewed attention as chips approach a utilization wall. Specialized accelerators can take advantage of underutilized transistors implementing custom hardware that ...
Low-cost and efficient fault detection and diagnosis schemes for modern cores
Continuous improvements in transistor scaling together with microarchitectural advances have made possible the widespread adoption of high-performance processors across all market segments. However, the growing reliability ...
Run-time support for multi-level disjoint memory address spaces
High Performance Computing (HPC) systems have become widely used tools in many industry areas and research fields. Research to produce more powerful and efficient systems has grown in par with their popularity. As a ...
Priority realloc : a threefold mechanism for route and resources allocation in EONs
Backbone networks are responsible for long-haul data transport serving many clients with a large volume of data. Since long-haul data transport service must rely on a robust high capacity network the current technology ...
Cache memory design in the FinFET era
The major problem in the future technology scaling is the variations in process parameters that are interpreted as imperfections in the development process. Moreover, devices are more sensitive to the environmental changes ...
On the scalability of LISP and advanced overlaid services
In just four decades the Internet has gone from a lab experiment to a worldwide, business critical infrastructure that caters to the communication needs of almost a half of the Earth's population. With these figures on its ...
On the programmability of multi-GPU computing systems
Multi-GPU systems are widely used in High Performance Computing environments to accelerate scientific computations. This trend is expected to continue as integrated GPUs will be introduced to processors used in multi-socket ...
An ontology-based approach toward the configuration of heterogeneous network devices
Despite the numerous efforts of standardization, semantic issues remain in effect in many subfields of networking. The inability to exchange data unambiguously between information systems and human resources is an issue ...
Energy-efficient mobile GPU systems
The design of mobile GPUs is all about saving energy. Smartphones and tablets are battery-operated and thus any type of rendering needs to use as little energy as possible. Furthermore, smartphones do not include sophisticated ...
Performance simulation methodologies for hardware/software co-designed processors
Recently the community started looking into Hardware/Software (HW/SW) co-designed processors as potential solutions to move towards the less power consuming and the less complex designs. Unlike other solutions, they reduce ...
The use of computational intelligence for security in named data networking
Information-Centric Networking (ICN) has recently been considered as a promising paradigm for the next-generation Internet, shifting from the sender-driven end-to-end communication paradigma to a receiver-driven content ...
Designs for increasing reliability while reducing energy and increasing lifetime
In the last decades, the computing technology experienced tremendous developments. For instance, transistors' feature size shrank to half at every two years as consistently from the first time Moore stated his law. ...
A pragmatic approach toward securing inter-domain routing
Internet security poses complex challenges at different levels, where even the basic requirement of availability of Internet connectivity becomes a conundrum sometimes. Recent Internet service disruption events have made ...
Resource management techniques aware of interference among high-performance computing applications
Network interference of nearby jobs has been recently identified as the dominant reason for the high performance variability of parallel applications running on High Performance Computing (HPC) systems. Typically, HPC ...
A novel access pattern-based multi-core memory architecture
Increasingly High-Performance Computing (HPC) applications run on heterogeneous multi-core platforms. The basic reason of the growing popularity of these architectures is their low power consumption, and high throughput ...
Resilience mechanisms for carrier-grade networks
In recent years, the advent of new Future Internet (FI) applications is creating ever-demanding requirements. These requirements are pushing network carriers for high transport capacity, energy efficiency, as well as ...
Atomic dataflow model
With the recent switch in the design of general purpose processors from frequency scaling of a single processor core towards increasing the number of processor cores, parallel programming became important not only for ...
