Now showing items 327-346 of 364
Sánchez Navarro, Francisco Jesús (Date of defense: 2001-11-06)
Las memorias caché fueron incorporadas en los microprocesadores ya desde los primeros tiempos, y representan la solución más común para tratar la diferencia de velocidad entre el procesador y la memoria. Sin embargo, muchos ...
Upasani, Gaurang R (Date of defense: 2016-02-01)
The sustained drive to downsize the transistors has reached a point where device sensitivity against transient faults due to neutron and alpha particle strikes a.k.a soft errors has moved to the forefront of concerns for ...
Vujic, Nikola (Date of defense: 2012-06-05)
Despite the fact that the most viable L1 memories in processors are caches, on-chip local memories have been a great topic of consideration lately. Local memories are an interesting design option due to their many benefits: ...
Fernández Muñoz, Javier (Date of defense: 2023-07-18)
(English) Machine Learning (ML) systems allow the efficient implementation of functionalities that can be hard to program by traditional software due to the high spectrum of inputs that hinder the definition of a specific ...
Duric, Milovan (Date of defense: 2016-01-26)
The worldwide utilization of mobile devices makes the segment of low power mobile processors leading in the entire computer industry. Customers demand low-cost, high-performance and energy-efficient mobile devices, which ...
Casas Guix, Marc (Date of defense: 2010-03-09)
This work is motivated by the growing intricacy of high performance computing infrastructures. For example, supercomputer MareNostrum (installed in 2005 at BSC) has 10240 processors and currently there are machines with ...
Marcuello Pascual, Pedro (Date of defense: 2003-07-22)
En esta tesis se estudia el modelo de ejecución de los procesadores multithreaded especulativos así como los requisitos necesarios para su implementación. El modelo de ejecución se basa en la inserción de instrucciones de ...
Pajuelo González, Manuel A. (Manuel Alejandro) (Date of defense: 2005-11-24)
Traditional vector architectures have been shown to be very effective in executing regular codes in which the compiler can detect data-level parallelism, i.e. repeating the same computation over different elements in the ...
Rana, Manish (Date of defense: 2016-10-18)
This thesis presents novel methods based on a combination of well-known statistical techniques for faster estimation of memory yield and their application in the design of energy-efficient subthreshold memories. The emergence ...
Yannuzzi, Marcelo (Date of defense: 2007-12-19)
Uno de los problemas más complejos en redes de computadores es el de proporcionar garantías de calidad y confiabilidad a las comunicaciones de datos entre entidades que se encuentran en dominios distintos. Esto se debe a ...
García Rudolph, Alejandro (Date of defense: 2016-02-04)
Traumatic brain injury (TBI) is a leading cause of disability worldwide. It is the most common cause of death and disability during the first three decades of life and accounts for more productive years of life lost than ...
Assaf, Simon Sassine (Date of defense: 2019-06-18)
Nanotechnology is widely seen as having huge potential to bring benefits to many areas of research and application. Nowadays, research studies are focusing on realizing nano-machines on the order of nanometers in size. A ...
Iqbal, Masab (Date of defense: 2023-03-24)
(English) Optical communication systems are widely adopted and responsible for transporting data traffic from access to metro to core networks supporting society’s information and communication functions. As the traffic ...
Stipić, Srđan (Date of defense: 2014-07-21)
Transactional Memory (TM) gives software developers the opportunity to write concurrent programs more easily compared to any previous programming paradigms and gives a performance comparable to lock-based synchronization ...
Armejach Sanosa, Adrià (Date of defense: 2014-06-13)
Transactional Memory (TM) aims to make shared memory parallel programming easier by abstracting away the complexity of managing shared data. The programmer defines sections of code, called transactions, which the TM system ...
Larrazabal Serrano, Germán Alberto (Date of defense: 2002-05-31)
Esta tesis se centra en el estudio de tecnicas de precondicionamiento para la resolucion de sistemas lineales de ecuaciones, provenientes de la resolucion de ecuaciones diferenciales en derivadas parciales. La caracteristica ...
Aguilar Saborit, Josep (Date of defense: 2006-07-14)
A continuación se presenta la Tesis doctoral que lleva por título Técnicas para la mejora del join paralelo y del procesamiento de secuencias temporales de datos, llevada a cabo por Josep Aguilar Saborit y dirigida por el ...
Karami, Amin (Date of defense: 2015-02-16)
Information-Centric Networking (ICN) has recently been considered as a promising paradigm for the next-generation Internet, shifting from the sender-driven end-to-end communication paradigma to a receiver-driven content ...
Panić, Miloš (Date of defense: 2018-05-25)
Critical Real-Time Embedded Systems (CRTES) are in charge of controlling fundamental parts of embedded system, e.g. energy harvesting solar panels in satellites, steering and breaking in cars, or flight management systems ...
Serrano, Maria A. (Date of defense: 2019-03-13)
The recent technological advancements and market trends are causing an interesting phenomenon towards the convergence of the high-performance and the embedded computing domains. Critical real-time embedded systems are ...