Departament d'Arquitectura de Computadors: Enviaments recents
Ara mostrant els elements 301-320 de 364
Analysis and architectural support for parallel stateful packet processing
The evolution of network services is closely related to the network technology trend. Originally network nodes forwarded packets from a source to a destination in the network by executing lightweight packet processing, or ...
Self-tuned parallel runtimes: a case of study for OpenMP
In recent years parallel computing has become ubiquitous. Lead by the spread of commodity multicore processors, parallel programming is not anymore an obscure discipline only mastered by a few.<br/>Unfortunately, the amount ...
Predicated execution and register windows for out-of-order processors
ISA extensions are a very powerful approach to implement new hardware techniques that require or benefit from compiler support: decisions made at compile time can be complemented at runtime, achieving a synergistic effect ...
Improving web server efficiency on commodity hardware
El ràpid creixement de la Web requereix una gran quantitat de recursos computacionals que han de ser utilitzats eficientment. Avui en dia, els servidors basats en hardware estendard son les plataformes preferides per ...
Affordable kilo-instruction processors
Diversos motius expliquen l'estancament en el que es troba el desenvolupament del processador tradicional dissenyat per maximitzar el rendiment d'un únic fil d'execució. Per una banda, técniques agressives com la supersegmentacó ...
Improving cache Behavior in CMP architectures throug cache partitioning techniques
The evolution of microprocessor design in the last few decades has changed significantly, moving from simple inorder single core architectures to superscalar and vector architectures in order to extract the maximum available ...
Aplicación de la simulación en tiempo real para mejorar la calidad de servicio del middleware
La utilización de aplicaciones de diferente naturaleza dentro de un mismo entorno, entorno heterogéneo, se está extendiendo gracias a la incorporación de técnicas de virtualización a los servidores. Compartir un servidor ...
Runahead threads
Los temas de investigación sobre multithreading han ganado mucho interés en la arquitectura de computadores con la aparición de procesadores multihilo y multinucleo. Los procesadores SMT (Simultaneous Multithreading) son ...
Formal mission specification and execution mechanisms for unmanned aircraft systems
Unmanned Aircraft Systems (UAS) are rapidly gaining attention due to the increasing potential of their applications in the civil domain. UAS can provide great value performing environmental applications, during emergency ...
Exploring coordinated software and hardware support for hardware resource allocation
Multithreaded processors are now common in the industry as they offer high performance at a low cost. Traditionally, in such processors, the assignation of hardware resources between the multiple threads is done implicitly, ...
Spectral analysis of executions of computer programs and its applications on performance analysis
This work is motivated by the growing intricacy of high performance computing infrastructures. For example, supercomputer MareNostrum (installed in 2005 at BSC) has 10240 processors and currently there are machines with ...
GRID superscalar: a programming model for the Grid
Durant els darrers anys el Grid ha sorgit com una nova plataforma per la computació distribuïda. La tecnologia Gris permet unir diferents recursos de diferents dominis administratius i formar un superordinador virtual amb ...
Heterogeneity-awareness in multithreaded multicore processors
During the last decades, Computer Architecture has experienced a great series of revolutionary changes. The increasing transistor count on a single chip has led to some of the main milestones in the field, from the release ...
"Virtual malleability" applied to MPI jobs to improve their execution in a multiprogrammed environment"
This work focuses on scheduling of MPI jobs when executing in shared-memory multiprocessors (SMPs). <br/>The objective was to obtain the best performance in response time in multiprogrammed multiprocessors systems using ...
Estudi i proposta d'esquemes d'avaluació per a dispositius ATM
Las contribuciones principales del trabajo realizado en esta tesis son: 1) estudio de la influencia del grado de rafagueo (burstiness) del trafico en el comportamiento de los dispositivos que integran una red ATM, 2) ...
