Departament d'Arquitectura de Computadors: Envíos recientes
Mostrando ítems 41-60 de 373
Development of cognitive workload models to detect driving impairment
Driving a vehicle is a complex activity exposed to continuous changes such as speed limits and vehicular traffic. Drivers require a high degree of concentration when performing this activity, increasing the amount of mental ...
Distributed collaborative knowledge management for optical network
Network automation has been long time envisioned. In fact, the Telecommunications Management Network (TMN), defined by the International Telecommunication Union (ITU), is a hierarchy of management layers (network element, ...
Large scale geostatistics with locally varying anisotropy
Classical geostatistical methods are based on the hypothesis of stationarity, which allows to apply repetitive sampling in different locations of the spatial domain, in order to obtain enough information to infer cumulative ...
Autonomous and reliable operation of multilayer optical networks
This Ph.D. thesis focuses on the reliable autonomous operation of multilayer optical networks. The first objective focuses on the reliability of the optical network and proposes methods for health analysis related to ...
On the co-design of scientific applications and long vector architectures
The landscape of High Performance Computing (HPC) system architectures keeps expanding with new technologies and increased complexity. To improve the efficiency of next-generation compute devices, architects are looking ...
Exploiting data locality in cache-coherent NUMA systems
The end of Dennard scaling has caused a stagnation of the clock frequency in computers.To overcome this issue, in the last two decades vendors have been integrating larger numbers of processing elements in the systems, ...
Adaptable register file organization for vector processors
Today there are two main vector processors design trends. On the one hand, we have vector processors designed for long vectors lengths such as the SX-Aurora TSUBASA which implements vector lengths of 256 elements (16384-bits). ...
Smart hardware designs for probabilistically-analyzable processor architectures
Future Critical Real-Time Embedded Systems (CRTES), like those is planes, cars or trains, require more and more guaranteed performance in order to satisfy the increasing performance demands of advanced complex software ...
Programming model abstractions for optimizing I/O intensive applications
This thesis contributes from the perspective of task-based programming models to the efforts of optimizing I/O intensive applications. Throughout this thesis, we propose programming model abstractions and mechanisms that ...
HPC memory systems: Implications of system simulation and checkpointing
The memory system is a significant contributor for most of the current challenges in computer architecture: application performance bottlenecks and operational costs in large data-centers as HPC supercomputers. With the ...
Connectivity sharing for wireless mesh networks
Internet access is still unavailable to one-third of the world population due to the lack of infrastructure, high cost, and the digital divide. Many access-limited communities opt for shared Internet access where they build ...
Flexible architecture for the future internet scalability of SDN control plane
Software-Defined Networking (SDN) separates the control plane from the data plane. The initial SDN approach involves a single centralized controller, which may not scale properly as a network grows in size. Distributed ...
Towards LoRa mesh networks for the IoT
There are several LPWAN radio technologies providing wireless communication to the billions of connected devices that form the so-called IoT. Among them, LoRa has emerged in recent years as a popular solution for low power ...
End-to-end network service orchestration in heterogeneous domains for next-generation mobile networks
5G marks the beginning of a deep revolution in the mobile network ecosystem, transitioning to a network of services to satisfy the demands of new players, the vertical industries. This revolution implies a redesign of the ...
Convergence of deep learning and high performance computing: challenges and solutions
Deep Learning has achieved outstanding results in many fields and led to groundbreaking discoveries. With the steady increase in datasets and model sizes, there has been a recent surge in Machine Learning applications in ...
On scalable, reconfigurable, and intelligent metasurfaces
Sixth Generation (6G) of wireless networks will be even more heterogeneous and dense as compared to Fifth Generation (5G) and other legacy networks. Thus, the 6G architecture will need to be adapted to serve the ever-evolving ...
Next generation overlay networks : security, trust, and deployment challenges
Overlay networks are a technique to build a new network on top of an existing one. They are a key tool to add functionality to existing networks, and are used in different layers of the Internet stack for a wide variety ...
Breaking host-centric management of task-based parallel programming models
Heterogeneous platforms had become popular to increase the computational power of the systems within a constrained power budget. They are present in several systems, from embedded platforms and mobile devices to high-end ...
Novel techniques to improve the performance and the energy of vector architectures
The rate of annual data generation grows exponentially. At the same time, there is a high demand to analyze that information quickly. In the past, every processor generation came with a substantial frequency increase, ...
Scheduling and resource management solutions for the scalable and efficient design of today's and tomorrow's HPC machines
In recent years, high-performance computing research became essential in pushing the boundaries of what men can know, predict, achieve, and understand in the experimented reality. HPC Workloads grow in size and complexity ...
