dc.description.abstract
Over the last decades, Organic Electronics has been emerging as a multidisciplinary and
innovative way to generate electronic devices and systems. It is intended to provide a
platform for low-cost, large-area, and low-frequency Printable Electronics on a variety
of substrates, including flexible plastic substrates. Just as the first information
revolution caused by integrated silicon circuits, PE is expected to cause another
revolution characterized by the distribution of information systems in all aspects of life.
Although the integrated circuits, based on Organic Thin Film Transistors (OTFT), are
not meant to compete with the silicon-based high-end industry, their performance have
already reached to a level enabling the use of organic technology to an ever-increasing
number of emerging applications, such as flexible optical displays, sensors, and low-end
microelectronics.
Currently, most of the digital integrated circuits are yet designed by specifying the
layout of each individual transistor and their interconnections. Full-custom design is
extremely labor-intensive, time consuming for complex circuits and it requires
advanced computer software in the design process, and several expensive mask sets in
the fabrication process. Besides, taking the soft and hard faults at transistor level into
account, the yield at system level is expected to be very low, since failure of one
transistor causes the entire circuit to fail. This is more important for technologies based
in non-crystalline materials (such as silicon) in which deposition and layer formation is
more irregular. On the other side, organic electronics is more complex than Printed
Circuit Boards (PCB) in the sense that these do not include active devices and do not
reach high integration level. Furthermore, similar to any new-born technology, the
performance of organic electronic circuits is degraded due to some limitations in
technological and materials sides. That being said, the question arises as to whether
circuit design techniques can be employed to compensate these bottlenecks so as to
meet yield and performance requirements.
The work presented in this thesis contributes to overcome the above-mentioned issues
by proposing the novel concept of Inkjet-configurable Gate Array (IGA) as a designmanufacturing
method for the direct mapping of digital functions on top of new
prefabricated structures. IGA brings together the advantages of semi-custom gate array
methodology, field-configurability, and fault-tolerance, and adopt it to Application
Specific Printed Electronic Circuit (ASPEC), which is the equivalent term to
Application Specific Integrated Circuit (ASIC), but for PE.
This alternative has two main advantages. Firstly, it allows implementing individual
circuit personalization at a very low cost through the best use of additive mask-less
digital printing techniques (e.g. Inkjet, Superfine Jet, and etc.) "in the field", thus
avoiding the need for One Time Programmable ROM-like (or E2PROM) devices.
Secondly, fault tolerance technique allows the adoption of a failure map to use only
working transistors for circuit implementation, thus, it helps to obtain high yield circuits
out of mid-yield foils.
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